The SN74LV1T02 is a single 2-input NOR gate with reduced input thresholds to support voltage translation applications.
- Single-supply voltage translator at 5.0-V, 3.3-V, 2.5-V, and 1.8-V VCC
- Operating range of 1.8 V to 5.5 V
- Up translation:
- 1.2 V(1) to 1.8 V at 1.8-V VCC
- 1.5 V(1) to 2.5 V at 2.5-V VCC
- 1.8 V(1) to 3.3 V at 3.3-V VCC
- 3.3 V to 5.0 V at 5.0-V VCC
- Down translation:
- 3.3 V to 1.8 V at 1.8-V VCC
- 3.3 V to 2.5 V at 2.5-V VCC
- 5.0 V to 3.3 V at 3.3-V VCC
- Logic output is referenced to VCC
- Output drive:
- 8 mA output drive at 5 V
- 7 mA output drive at 3.3 V
- 3 mA output drive at 1.8 V
- Characterized up to 50 MHz at 3.3-V VCC
- 5V Tolerance on input pins
- –40°C to 125°C operating temperature range
- Pb-free packages available: SC-70 (DCK)
- 2 × 2.1 × 0.65 mm (height 1.1 mm)
- Latch-up performance exceeds 250 mA per JESD 17
- Supports standard logic pinouts
- CMOS output B compatible with AUP1G and LVC1G families (1)
(1)Refer to the VIH/VIL and output drive for lower VCC condition.
| Technology family | LV1T |
| Bits (#) | 1 |
| High input voltage (min) (V) | 1 |
| High input voltage (max) (V) | 5.5 |
| Vout (min) (V) | 1.65 |
| Vout (max) (V) | 5.5 |
| Data rate (max) (MBits) | 100 |
| IOH (max) (mA) | -8 |
| IOL (max) (mA) | 8 |
| Supply current (max) (µA) | 10 |
| Features | Over-voltage tolerant inputs, Single supply |
| Input type | TTL-Compatible CMOS |
| Output type | Balanced CMOS, Push-Pull |
| Operating temperature range (°C) | -40 to 125 |