The LMX2485Q-Q1 is a low power, high performance delta-sigma fractional-N PLL with an
auxiliary integer-N PLL. The device is fabricated using TI’s advanced process.
With delta-sigma architecture, fractional spurs at lower offset frequencies are pushed
to higher frequencies outside the loop bandwidth. The ability to push close in spur and phase noise
energy to higher frequencies is a direct function of the modulator order. Unlike analog
compensation, the digital feedback technique used in the LMX2485Q-Q1 is highly resistant to changes
in temperature and variations in wafer processing. The LMX2485Q-Q1 delta-sigma modulator is
programmable up to fourth order, which allows the designer to select the optimum modulator order to
fit the phase noise, spur, and lock time requirements of the system.
Serial data for programming the LMX2485Q-Q1 is transferred through a three-line,
high-speed (20-MHz) MICROWIRE interface. The LMX2485Q-Q1 offers fine frequency resolution, low
spurs, fast programming speed, and a single word write to change the frequency. This makes it ideal
for direct digital modulation applications, where the N-counter is directly modulated with
information. The LMX2485Q-Q1 is available in a 24-lead 4.0 × 4.0 × 0.8 mm WQFN package.
- Quadruple Modulus Prescaler for Lower Divides
- RF PLL: 8/9/12/13 or 16/17/20/21
- IF PLL: 8/9 or 16/17
- Advanced Delta Sigma Fractional Compensation
- 12-Bit or 22-Bit Selectable Fractional Modulus
- Up to 4th Order Programmable Delta-Sigma
Modulator
- Improved Lock Times and Programming
- Fastlock / Cycle Slip Reduction Requiring Only
a Single-Word Write - Integrated Time-Out Counter
- Wide Operating Range
- LMX2485Q-Q1 RF PLL: 500 MHz to 3.1 GHz
- Useful Features
- Digital Lock Detect Output
- Hardware and Software Power-Down Control
- On-Chip Input Frequency Doubler
- RF Phase Detector Frequency Up to 50 MHz
- 2.5-V to 3.6-V Operation With ICC = 5.0 mA
- LMX2485Q-Q1 is AEC-Q100 Grade 2
Qualified and is Manufactured on an
Automotive Grade Flow
| Integrated VCO | No |
| Output frequency (min) (MHz) | 500 |
| Output frequency (max) (MHz) | 3100 |
| Normalized PLL phase noise (dBc/Hz) | -210 |
| Current consumption (mA) | 5 |
| Features | AEC-Q100 Grade 2 qualified, Advanced delta-sigma fractional compensation, Cycle slip reduction, Dual PLL, Fastlock, Integrated timeout counter, On-chip input frequency doubler |
| 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) | -104 |
| Rating | Automotive |
| Operating temperature range (°C) | -40 to 105 |
| Lock time (µs) (typ) | Loop BW dependent |