ADC32RF82 Texas instruments

ADC32RF82

Уточнить цену

ADC32RF82

Уточнить цену

СРАВНИТЬ

В СРАВНЕНИИ

Уточнить цену

Описание

The ADC32RF82 is a 14-bit, 2457.6-MSPS, dual-channel telecom receiver and feedback device family that supports RF sampling with input frequencies up to 4 GHz and beyond. Designed for high signal-to-noise ratio (SNR), the ADC32RF82 delivers a noise spectral density of –154.1 dBFS/Hz as well as dynamic range and channel isolation over a large input frequency range. The buffered analog input with on-chip termination provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy.Each channel can be connected to a dual-band, digital down-converter (DDC) with up to three independent, 16-bit numerically-controlled oscillators (NCOs) per DDC for phase-coherent frequency hopping. Additionally, the ADC is equipped with front-end peak and RMS power detectors and alarm functions to support external automatic gain control (AGC) algorithms.The ADC32RF82 supports the JESD204B serial interface with subclass 1-based deterministic latency using data rates up to 12.5 Gbps with up to four lanes per ADC. The device is offered in a 72-pin VQFN package (10 mm × 10 mm) and supports the industrial temperature range (–40°C to +85°C).

14-Bit, Dual-Channel, 2457.6-MSPS ADC
Noise Floor: –154.1 dBFS/Hz
RF Input Supports Up to 4.0 GHz
Aperture Jitter: 90 f_S
Channel Isolation: 95 dB at f_IN = 1.8 GHz
Spectral Performance (f_IN = 900 MHz, –2 dBFS):
- SNR: 61.2 dBFS
- SFDR: 67-dBc HD2, HD3
- SFDR: 81-dBc Worst Spur
Spectral Performance (f_IN = 1.85 GHz, –2 dBFS):
- SNR: 58.7 dBFS
- SFDR: 71-dBc HD2, HD3
- SFDR: 76-dBc Worst Spur
On-Chip Digital Down-Converters:
- Up to 4 DDCs (Dual-Band Mode)
- Up to 3 Independent NCOs per DDC
On-Chip Input Clamp for Overvoltage Protection
Programmable On-Chip Power Detectors with Alarm Pins for AGC Support
On-Chip Dither
On-Chip Input Termination
Input Full-Scale: 1.35 V_PP
Support for Multi-Chip Synchronization
JESD204B Interface:
- Subclass 1-Based Deterministic Latency
- 4 Lanes Per Channel at 12.5 Gbps
Power Dissipation: 3.0 W/Ch at 2457.6 MSPS
72-Pin VQFN Package (10 mm × 10 mm)

Number of input channels	2
Resolution (Bits)	14
Sample rate (max) (Msps)	2456
Features	Decimating Filter, Ultra High Speed
Analog input BW (MHz)	3200
SFDR (typ) (dB)	67
SNR (typ) (dB)	61.2
Power consumption (typ) (mW)	5500
Operating temperature range (°C)	-40 to 85
Rating	Catalog