The CSD75207W15 device is designed to deliver the lowest on-resistance and gate charge in
the smallest outline possible with excellent thermal characteristics in an ultra-low profile. Low
on-resistance coupled with the small footprint and low profile make the device ideal for
battery-operated space-constrained applications. The device has also been awarded with U.S. patents
7952145, 7420247, 7235845, and 6600182.
- Dual P-Channel MOSFETs
- Common Source Configuration
- Small Footprint 1.5-mm × 1.5-mm
- Gate-Source Voltage Clamp
- Gate ESD Protection >4 kV
- HBM JEDEC standard JESD22-A114
- Pb and Halogen Free
- RoHS Compliant
| VDS (V) | -20 |
| VGS (V) | -6 |
| Configuration | Dual Common Source |
| Rds(on) at VGS=4.5 V (max) (mΩ) | 27 |
| Rds(on) at VGS=2.5 V (max) (mΩ) | 39 |
| Rds(on) at VGS=1.8 V (max) (mΩ) | 81 |
| Id peak (max) (A) | -24 |
| Id max cont (A) | -3.9 |
| QG (typ) (nC) | 2.9 |
| QGD (typ) (nC) | 0.4 |
| QGS (typ) (nC) | 0.7 |
| VGSTH typ (typ) (V) | -0.8 |
| ID - silicon limited at TC=25°C (A) | 3.9 |
| Logic level | Yes |
| Operating temperature range (°C) | -55 to 150 |
| Rating | Catalog |