The device is designed to deliver the lowest on resistance and gate charge in the smallest outline possible with excellent thermal characteristics in an ultra-low profile.
- Ultra-low on resistance
- Ultra-low Qg and Qgd
- Small footprint 1.0 mm × 1.5 mm
- Low profile 0.62 mm height
- Pb Free
- Gate-source voltage clamp
- Gate ESD protection – 3 kV
- RoHS compliant
- Halogen free
| VDS (V) | -20 |
| VGS (V) | -6 |
| Configuration | Single |
| Rds(on) at VGS=4.5 V (max) (mΩ) | 33 |
| Rds(on) at VGS=2.5 V (max) (mΩ) | 44 |
| Id peak (max) (A) | -9.5 |
| Id max cont (A) | -3.2 |
| QG (typ) (nC) | 3.4 |
| QGD (typ) (nC) | 0.2 |
| QGS (typ) (nC) | 1.1 |
| VGSTH typ (typ) (V) | -0.8 |
| ID - silicon limited at TC=25°C (A) | 3.2 |
| Logic level | Yes |
| Operating temperature range (°C) | -55 to 150 |
| Rating | Catalog |