The SN74LVC1G27 device performs the Boolean function Y = A + B + C or Y = A • B • C in positive logic. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
- Available in the Texas Instruments NanoFree Package
- Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Supports Down Translation to VCC
- Max tpd of 4.5 ns at 3.3 V
- Low Power Consumption, 10-µA Max ICC
- ±24-mA Output Drive at 3.3 V
- Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
- Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II - ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
| Technology family | LVC |
| Number of channels | 1 |
| Supply voltage (min) (V) | 1.65 |
| Supply voltage (max) (V) | 5.5 |
| Inputs per channel | 3 |
| IOL (max) (mA) | 32 |
| IOH (max) (mA) | -32 |
| Output type | Push-Pull |
| Input type | Standard CMOS |
| Features | Over-voltage tolerant Inputs, Partial power down (Ioff), Ultra high speed (tpd |
| Data rate (max) (MBits) | 100 |
| Rating | Catalog |
| Operating temperature range (°C) | -40 to 125, -40 to 85 |