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SN74LVC2G126-EP Texas instruments

SN74LVC2G126-EP
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SN74LVC2G126-EP
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This dual bus buffer gate is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC2G126 is a dual bus driver/line driver with 3-state outputs. The outputs are disabled when the associated output-enable (OE) input is low. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 6.8 ns at 3.3 V
  • Low Power Consumption, 10-μA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Typical VOLP (Output Ground Bounce)
    <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    >2 V at VCC = 3.3 V, TA = 25°C
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS

  • Controlled Baseline
  • One Assembly and Test Site
  • One Fabrication Site
  • Available in Military (–55°C to 125°C) Temperature Range
  • Extended Product Life Cycle
  • Extended Product-Change Notification
  • Product Traceability

Technology family LVC
Supply voltage (min) (V) 1.65
Supply voltage (max) (V) 5.5
Number of channels 2
IOL (max) (mA) 32
Supply current (max) (µA) 10
IOH (max) (mA) -32
Input type Standard CMOS
Output type 3-State
Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)
Rating HiRel Enhanced Product
Operating temperature range (°C) -55 to 125
SN74LVC2G126-EP