The SN74LVC2G38 is designed for 1.65-V to 5.5-V VCC operation. This device is a dual two-input NAND buffer gate with open-drain outputs. It performs the Boolean function Y = A • B or Y = A + B in positive logic. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
- Available in the Texas Instruments NanoFree Package
- Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Max tpd of 4 ns at 3.3 V
- Low Power Consumption, 10-μA Max ICC
- ±24-mA Output Drive at 3.3 V
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C - Ioff Supports Live insertion, Partial-Power-Down Mode Operation and Back Drive Protection
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
| Technology family | LVC |
| Supply voltage (min) (V) | 1.65 |
| Supply voltage (max) (V) | 5.5 |
| Number of channels | 2 |
| Inputs per channel | 2 |
| IOL (max) (mA) | 32 |
| IOH (max) (mA) | 0 |
| Input type | Standard CMOS |
| Output type | Open-drain |
| Features | Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd |
| Data rate (max) (MBits) | 100 |
| Rating | Catalog |
| Operating temperature range (°C) | -40 to 125, -40 to 85 |