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SN54LVC00A-SP Texas instruments

SN54LVC00A-SP
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SN54LVC00A-SP
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The SN54LVC00A quadruple 2-input positive-NAND gate is designed for 2.7-V to 3.6-V VCC operation, and the SN74LVC00A quadruple 2-input positive-NAND gate is designed for 1.65-V to 3.6-V VCC operation. The SNx4LVC00A devices perform the Boolean function Y = A × B or Y = A + B in positive logic. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.
  • Operate From 1.65 V to 3.6 V
  • Specified From –40°C to 85°C, –40°C to 125°C,
    and –55°C to 125°C
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.3 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    > 2 V at VCC = 3.3 V, TA = 25°C
  • Latch-Up Performance Exceeds 250 mA
    Per JESD 17
  • On Products Compliant to MIL-PRF-38535,
    All Parameters Are Tested Unless Otherwise
    Noted. On All Other Products, Production
    Processing Does Not Necessarily Include Testing
    of All Parameters.
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model
    • 200-V Machine Model
    • 1000-V Charged-Device Model
Technology family LVC
Supply voltage (min) (V) 2
Supply voltage (max) (V) 3.6
Number of channels 4
Inputs per channel 2
IOL (max) (mA) 24
IOH (max) (mA) -24
Input type Standard CMOS
Output type Push-Pull
Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd
Data rate (max) (MBits) 100
Rating Space
Operating temperature range (°C) -55 to 125
SN54LVC00A-SP