UCC27528-Q1 Texas instruments

UCC27528-Q1

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UCC27528-Q1

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Описание

The UCC27528-Q1 device is a dual-channel, high-speed, low-side gate driver capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, the UCC27528-Q1 device can deliver high-peak current pulses of up to 5-A source and 5-A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay of 17 ns (typical). In addition, the drivers feature matched internal propagation delays between the two channels which are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. The input pin thresholds are based on CMOS logic, which is a function of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity. The enable pins are based on TTL and CMOS compatible logic, independent of the VDD supply voltage. The UCC27528-Q1 device is a dual noninverting driver. Internal pullup and pulldown resistors on the input pins of the UCC27528-Q1 device ensure that outputs are held low when input pins are in floating condition. The UCC27528-Q1 device features enable pins (ENA and ENB) for better control of the operation of the driver applications. The pins are internally pulled up to the VDD supply for active-high logic and can be left open for standard operation.

Qualified for Automotive Applications
AEC-Q100 Device Temperature Grade 1
Industry-Standard Pin Out
Two Independent Gate-Drive Channels
5-A Peak Source and Sink Drive Current
CMOS Input Logic Threshold
(Function of Supply Voltage on VDD Pins)
Hysteretic Logic Thresholds for High Noise
Immunity
Independent Enable Function for Each Output
Inputs and Enable Pin Voltage Levels Not
Restricted by VDD Pin Bias Supply Voltage
4.5-V to 18-V Single Supply Range
Outputs Held Low During VDD UVLO (Ensures
Glitch-Free Operation at Power Up and Power
Down)
Fast Propagation Delays (17-ns Typical)
Fast Rise and Fall Times (7-ns and 6-ns Typical)
1-ns Typical Delay Matching Between 2 Channels
Outputs Held in Low When Inputs Floating
SOIC-8 Package
Operating Temperature Range of –40°C to 140°C
–5-V Negative Voltage Handling Capability on
Input Pins

Number of channels	2
Power switch	GaNFET, IGBT, MOSFET
Peak output current (A)	5
Input VCC (min) (V)	4.5
Input VCC (max) (V)	18
Features	Negative Voltage Handling on Input
Operating temperature range (°C)	-40 to 140
Rise time (ns)	7
Fall time (ns)	6
Propagation delay time (µs)	0.017
Input threshold	CMOS
Channel input logic	Dual, Non-Inverting
Input negative voltage (V)	-5
Rating	Automotive
Undervoltage lockout (typ) (V)	4
Driver configuration	Dual, Non-Inverting