SN74LS107A Texas instruments

SN74LS107A

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SN74LS107A

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Описание

The '107 contain two independent J-K flip-flops with individual J-K, clock, and direct clear inputs. The '107 is a positive pulse-triggered flip-flop. The J-K input data is loaded into the master while the clock is high and transferred to the slave and the outputs on the high-to-low clock transition. For these devices the J and K inputs must be stable while the clock is high. The 'LS107A contain two independent negative-edge-triggered flip-flops. The J and K inputs must be stable prior to the high-to-low clock transition for predictable operation. When the clear is low, it overrides the clock and data inputs forcing the Q output low and the Q\ output high. The SN54107 and the SN54LS107A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74107 and the SN74LS107A are characterized for operation from 0°C to 70°C.

Package Options Include Plastic “Small Outline" Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPs
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Number of channels	2
Technology family	LS
Supply voltage (min) (V)	4.75
Supply voltage (max) (V)	5.25
Input type	TTL
Output type	Push-Pull
Clock frequency (MHz)	30
Supply current (max) (µA)	6000
IOL (max) (mA)	8
IOH (max) (mA)	-0.4
Features	Clear, High speed (tpd 10-50ns), Negative edge triggered
Operating temperature range (°C)	0 to 70
Rating	Catalog