CD74AC112 Texas instruments

CD74AC112

Уточнить цену

CD74AC112

Уточнить цену

СРАВНИТЬ

В СРАВНЕНИИ

Уточнить цену

Описание

The AC112 devices contain two independent J-K negative-edge-triggered flip-flops. A low level at the preset (PRE)\ or clear (CLR)\ inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE\ and CLR\ are inactive (high), data at the J and K inputs meeting the setup-time requirements is transferred to the outputs on the negative-going edge of the clock pulse (CLK). Clock triggering occurs at a voltage level and is not directly related to the fall time of the clock pulse. Following the hold-time interval, data at the J and K inputs may be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by tying J and K high.

AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage
Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
Balanced Propagation Delays
±24-mA Output Drive Current
- Fanout to 15 F Devices
SCR-Latchup-Resistant CMOS Process and Circuit Design
Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015

Number of channels	2
Technology family	AC
Supply voltage (min) (V)	1.5
Supply voltage (max) (V)	5.5
Input type	LVTTL/CMOS
Output type	Push-Pull
Clock frequency (MHz)	100
Supply current (max) (µA)	80
IOL (max) (mA)	24
IOH (max) (mA)	-24
Features	Balanced outputs, Clear, High speed (tpd 10-50ns), Negative edge triggered, Positive input clamp diode, Preset
Operating temperature range (°C)	-55 to 125
Rating	Catalog