The SN74AXC4T245 is a four-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXC4T245 is compatible with a single-supply system.The SN74AXC4T245 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (1DIR and 2DIR). The output-enable inputs (1 OE and 2 OE) are used to disable the outputs so the buses are effectively isolated. The SN74AXC4T245 device is designed so the control pins (xDIR and x OE) are referenced to VCCA.To ensure the high-impedance state of the level shifter I/Os during power up or power down, the x OE pins should be tied to VCCA through a pullup resistor.This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.The VCC isolation feature ensures that if either VCCA or VCCB is less than 100 mV, both I/O ports enter a high-impedance state by disabling their outputs.Glitch-Free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.
- Fully Configurable Dual-Rail Design Allows Each Port to Operate With a Power Supply Range From 0.65 V to 3.6 V
- Operating Temperature From –40°C to +125°C
- Multiple Direction Control Pins to Allow Simultaneous Up and Down Translation
- Glitch-Free Power Supply Sequencing
- Up to 380 Mbps Support When Translating from 1.8 V to 3.3 V
- VCC Isolation Feature
- If Either VCC Input is Below 100 mV, All I/Os Outputs are Disabled and Become High-Impedance
- Ioff Supports Partial-Power-Down Mode Operation
- Compatible With AVC Family Level Shifters
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 8000-V Human-Body Model
- 1000-V Charged-Device Model
| Technology family | AXC |
| Applications | JTAG, SPI, UART |
| Bits (#) | 4 |
| High input voltage (min) (V) | 0.455 |
| High input voltage (max) (V) | 3.6 |
| Vout (min) (V) | 0.65 |
| Vout (max) (V) | 3.6 |
| Data rate (max) (MBits) | 380 |
| IOH (max) (mA) | -12 |
| IOL (max) (mA) | 12 |
| Supply current (max) (µA) | 40 |
| Features | Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation |
| Input type | Standard CMOS |
| Output type | 3-State, Balanced CMOS, Push-Pull |
| Rating | Catalog |
| Operating temperature range (°C) | -40 to 125 |