This 4-bit noninverting bus transceiver uses two separate configurable power-supply
rails. The A port is designed to track VCCA. VCCA
accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track
VCCB. VCCB accepts any supply voltage from
1.2 V to 3.6 V. The SN74AVC4T245-Q1 is optimized to
operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is
operational with VCCA/VCCB as low as 1.2 V. This
allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V,
2.5-V, and 3.3-V voltage nodes.
The SN74AVC4T245-Q1 is designed for asynchronous communication between two data buses.
The logic levels of the direction-control (DIR) input and the output-enable
(OE) input activate either the B-port outputs or the A-port outputs or place
both output ports into the high-impedance mode. The device transmits data from the A bus to the B
bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs
are activated. The input circuitry on both A and B ports is always active and must have a logic
HIGH or LOW level applied to prevent excess ICC and
ICCZ.
The SN74AVC4T245-Q1 is designed so that the control pins (1DIR, 2DIR,
1OE, and 2OE) are supplied by
VCCA.
This device is fully specified for partial-power-down applications using
Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either
VCC input is at GND, then both ports are in the high-impedance state.
To ensure the high-impedance state during power up or power down,
OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the
driver.
- Qualified for Automotive Applications
- AEC-Q100 Qualified With the Following Results:
- Device Temperature Grade 1: –40°C to 125°C
Ambient Operating Temperature Range - Device HBM ESD Classification Level H3B (JESD 22 A114-A)
- Device CDM ESD Classification Level C5 (JESD 22 C101)
- Control Input VIH and VIL Levels Are Referenced to VCCA Voltage
- Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2-V to 3.6-V Power-Supply Range
- I/Os Are 4.6-V Tolerant
- Ioff Supports Partial Power-Down-Mode Operation
- Maximum Data Rates
- 380 Mbps (1.8-V to 3.3-V Translation)
- 200 Mbps (<1.8-V to 3.3-V Translation)
- 200 Mbps (Translate to 2.5 V or 1.8 V)
- 150 Mbps (Translate to 1.5 V)
- 100 Mbps (Translate to 1.2 V)
- Latch-Up Performance Exceeds 100 mA per JESD 78, Class II
- APPLICATIONS
- Telematics
- Cluster
- Head Unit
- Navigation Systems
All other trademarks are the property of their respective owners
| Technology family | AVC |
| Applications | JTAG, SPI, UART |
| Bits (#) | 4 |
| High input voltage (min) (V) | 0.78 |
| High input voltage (max) (V) | 3.6 |
| Vout (min) (V) | 1.2 |
| Vout (max) (V) | 3.6 |
| Data rate (max) (MBits) | 380 |
| IOH (max) (mA) | -12 |
| IOL (max) (mA) | 12 |
| Supply current (max) (µA) | 16 |
| Features | Output enable, Overvoltage tolerant inputs, Partial power down (Ioff) |
| Input type | Standard CMOS |
| Output type | 3-State, Balanced CMOS, Push-Pull |
| Rating | Automotive |
| Operating temperature range (°C) | -40 to 125 |