The SN74LVC138A devices are designed for high-performance memory-decoding or data-routing
applications requiring very short propagation delay times. In high-performance memory systems,
these decoders minimize the effects of system decoding. When employed with high-speed memories
using a fast enable circuit, delay times of these decoders and the enable time of the memory
usually are less than the typical access time of the memory. This means that the effective system
delay introduced by the decoders is negligible.
- Operate From 1.65 V to 3.6 V
- Inputs Accept Voltages to 5.5 V
- Max tpd of 5.8 ns at 3.3 V
- Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C
- Latch-Up Performance Exceeds 250 mA Per JESD 17
| Technology family | LVC |
| Number of channels | 1 |
| Operating temperature range (°C) | -55 to 125 |
| Rating | Space |
| Supply current (max) (µA) | 10 |