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SN74AUC08 Texas instruments

SN74AUC08
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SN74AUC08
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This quadruple 2-input positive-AND gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation. The SN74AUC08 device performs the Boolean function Y = A • B or Y = A • B in positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
  • Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • Ioff Supports Partial-Power-Down Mode Operation
  • Sub-1-V Operable
  • Max tpd of 1.9 ns at 1.8 V
  • Low Power Consumption, 10-µA Max ICC
  • ±8-mA Output Drive at 1.8 V
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    – 2000-V Human-Body Model (A114-A)
    – 200-V Machine Model (A115-A)
    – 1000-V Charged-Device Model (C101)

Technology family AUC
Supply voltage (min) (V) 0.8
Supply voltage (max) (V) 2.7
Number of channels 4
Inputs per channel 2
IOL (max) (mA) 9
IOH (max) (mA) -9
Input type Standard CMOS
Output type Push-Pull
Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd
Data rate (max) (MBits) 250
Rating Catalog
Operating temperature range (°C) -40 to 85
SN74AUC08